Design and Implementation of a Digital System with Verilog Modules: Frequency Divider, Up/Down Counter (Mod 100), and 7-Segment Drivers
The task is design and implementation of a digital system shown in the figure. The project consists of three major modules (Verilog): Frequency divider, Up/Down Counter (Mod 100), 7-Seg Drivers. The frequency divider receives 5 MHz from Clock 50 (PIN_AF14) and divides is to 50000 to generate 1 Hz frequency at the output (The code is provided). The Mod 100 counter counts with 1 Hz […]