MODULAR PROGRAMME
COURSEWORK ASSESSMENT SPECIFICATION
Module Code
UFCF93-30-1 |
Run
Feb21 |
Module Title
Computer and Network Systems |
Module Leader
Mazhar Malik |
Module Coordinator
|
Module Tutors
Ali Shahidinejad, Muhammad Nadeem |
Component and Element Number
B – CW 2 |
Weighting: (22.5 % of the Module’s assessment)
45% of Component B |
|
Element Description
Programing Assignment + Report |
Total Assignment time
30 Days |
Dates
Date of Announcement : 28 March 2021 | Date to be Returned to Students
13 April 2021 |
Submission Place
Moodle
|
Submission Date
28 April 2021 |
Submission Time 14:00 GST |
report Softcopy + source code + demonstration (live/recorded) |
Deliverables
Module Leader Signature
Mazhar Malik |
PROGRAMMING ASSIGNMENT WITH REPORT
UFCF93-30-1 CNS: Course Work 2 Specification, Feb 2021
This assignment is divided into two tasks. Tasks1 is a research survey report whereas Task2 is related to programming. The tasks are described as follows:
Stage 2 |
Stage 1 |
Figure 1 D-Flip-flop with clock pulse (CP)
Figure 1 shows a D flip-flop with clock pulse (CP). D is directly passed from stage1 to stage 2 through NAND gate and passed as inverted through gate 5 and gate 4. The input D is always sampled when the system CP is 1.
Considering the memory element in Figure 1, perform the following tasks:
Deliverables
The report and the coding tasks along with the required description must be placed into a .zip file and submitted
Marking Scheme
Marks [0-10]
Sub-Task No. | Task Evaluation | Poor | Average | Excellent | Marks 30% |
a. | FSM design include state table and state diagram | [0-10] | |||
b. | C code (Efficient logic, use of loops and conditional statements) and testing. Description of code | [0-15]
|
|||
c. | Short report on shift registers should be well structured it will follow the same structure as in task 1 | [0-20] | |||
d. | C code (Efficient logic, use of loops and conditional statements) and testing | [0-25] |
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